#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/ide.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/gpio.h>
#include <asm/mach/map.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <linux/cdev.h>


#define LED_CNT 1
#define NAME "newchrled"

#define GPIO_BASE       0xE000A000
#define DATA_OFFSET     0x40
#define DIRM_OFFSET     0x204
#define OUTEN_OFFSET    0x208
#define INTDIS_OFFSET   0x214
#define APER_CLK_CTRL   0xF800012C


static void __iomem *data_reg;
static void __iomem *dirm_reg;
static void __iomem *outen_reg;
static void __iomem *intdis_reg;
static void __iomem *aper_clk_reg;

struct newchrled_dev{
    dev_t devid;
    struct cdev cdev;
    struct class *class;
    struct device *device;
    int major;
    int minor;
};

static struct newchrled_dev newchrled;


static int newchrled_open(struct inode *inode, struct file *filp)
{
    filp->private_data=&newchrled;

    printk("newchrled open!\n");
    return 0;
}

static int newchrled_release(struct inode *inode, struct file *filp)
{
    printk("newchrled released!\n");
    return 0;
}

static ssize_t newchrled_read(struct file *filp, char __user *buf, size_t cnt, loff_t *offt)
{
    return 0;
}

static ssize_t newchrled_write(struct file *filp, const char __user *buf, size_t cnt, loff_t *offt)
{
    int ret,val;
    char kern_buf[1];
    ret=copy_from_user(kern_buf,buf,cnt);

    val=readl(data_reg);
    if(kern_buf[0]==0){
        val &=~(1<<7);
    }
    else{
        val |=1<<7;
    }
    writel(val,data_reg);

    return 0;
}

static struct file_operations newchrled_fops={
    .owner=THIS_MODULE,
    .open=newchrled_open,
    .read=newchrled_read,
    .write=newchrled_write,
    .release=newchrled_release,
};

static void newchrled_ioremap(void)
{
    data_reg=ioremap(GPIO_BASE+DATA_OFFSET,4);
    dirm_reg=ioremap(GPIO_BASE+DIRM_OFFSET,4);
    outen_reg=ioremap(GPIO_BASE+OUTEN_OFFSET,4);   
    intdis_reg=ioremap(GPIO_BASE+INTDIS_OFFSET,4);
    aper_clk_reg=ioremap(APER_CLK_CTRL,4);  
}

static void newchrled_iounmap(void)
{
    iounmap(data_reg);
    iounmap(dirm_reg);
    iounmap(outen_reg);   
    iounmap(intdis_reg);
    iounmap(aper_clk_reg);     
}


static int __init newchrled_init(void)
{
    u32 val;
    int ret;

    /*1*/
    newchrled_ioremap();

    /*2*/
    val=readl(aper_clk_reg);
    val|=1<<22;
    writel(val,aper_clk_reg);

    /*3*/
    val=0;
    val|=1<<7;
    writel(val,intdis_reg);

    /*4*/
    val=readl(dirm_reg);
    val |=1<<7;
    writel(val,dirm_reg);

    /*5*/
    val=readl(outen_reg);
    val|=1<<7;
    writel(val,outen_reg);

    /*6*/
    val=readl(data_reg);
    val &=~(1<<7);
    writel(val,data_reg);

    /*7*/
    if(newchrled.major){
        newchrled.devid=MKDEV(newchrled.major,0);
        ret=register_chrdev_region(newchrled.devid, LED_CNT, NAME);
    }
    else {
        ret=alloc_chrdev_region(&newchrled.devid, 0, LED_CNT, NAME);
        newchrled.major=MAJOR(newchrled.devid);
        newchrled.minor=MINOR(newchrled.devid);
    }

    printk("newchrled major=%d, minor=%d\n", newchrled.major, newchrled.minor);

    /*8*/
    newchrled.cdev.owner=THIS_MODULE;
    cdev_init(&newchrled.cdev, &newchrled_fops);
    ret=cdev_add(&newchrled.cdev, newchrled.devid, LED_CNT);

    /*9*/
    newchrled.class=class_create(THIS_MODULE, NAME);
    newchrled.device=device_create(newchrled.class,
                                    NULL,
                                    newchrled.devid,
                                    NULL,
                                    NAME);
    
    return 0;
}

static void __exit newchrled_exit(void)
{
    device_destroy(newchrled.class, newchrled.devid);
    class_destroy(newchrled.class);
    cdev_del(&newchrled.cdev);
    unregister_chrdev_region(newchrled.devid, LED_CNT);
    newchrled_iounmap();

    printk("newchrled_exit()\n");
}

module_init(newchrled_init);
module_exit(newchrled_exit);

MODULE_AUTHOR("xujianchao");
MODULE_DESCRIPTION("xujianchao ZYNQ GPIO LED Driver");
MODULE_LICENSE("GPL");
